Wednesday, March 13, 2013

Raspberry Pi Hardware Support for Thread Synchronization

Hardware support for synchronization in multithreaded application could improve its execution time and responsiveness. The synchronization primitives mostly available in the form of atomic Compare-and-Swap instruction. On x86/x64 architecture, the instruction is called CMPXCHGXX which stands for compare-and-exchange (the XX is only a placeholder because there are several variants of the instruction). On ARM architecture, the support is in the form of the SWP (swap) instruction.

Raspberry Pi CPU supports the SWP instruction. You can see this when you "cat /proc/cpuinfo" as follows:
pi@raspberrypi ~ $ cat /proc/cpuinfo
Processor       : ARMv6-compatible processor rev 7 (v6l)
BogoMIPS        : 697.95
Features        : swp half thumb fastmult vfp edsp java tls
CPU implementer : 0x41
CPU architecture: 7
CPU variant     : 0x0
CPU part        : 0xb76
CPU revision    : 7

Hardware        : BCM2708
Revision        : 000f
Serial          : 00000000231c08f2
As you can see, the swp instruction exist in the BCM2708, the CPU on the Raspberry Pi SoC. Therefore, we could expect that multithreaded application ported from the PC (x86/x64) could seamlessly ported to Raspberry Pi with expectation that the synchronization primitives would work with the help of the hardware (via swp instruction). I have yet to do some tests on this. It should be on the next post on the Raspberry Pi subject.
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